Recently, ReRAM has been attracting attention as a nonvolatile memory that could replace a flash memory. The ReRAM is characteristic in fast writing and high density and thus expected to serve as a nonvolatile memory used for a business purpose or used in a mobile system.
Typically, the ReRAM is composed of a plurality of memory cells arranged in a matrix form, and each of the memory cells includes a nonvolatile resistance storage element. The memory cell has a structure including one resistance storage element (1R type) alone, or another structure including one transistor and one resistance storage element (1T1R type). FIG. 9 illustrates an example of the structure of the memory cell of the 1T1R-type. The memory cell of the 1T1R-type includes three terminals: a drain, a gate, and a source. The nonvolatile storage device applies a voltage to the gate of a specific memory cell and thus selects a memory cell to write data thereto, or to read data therefrom.
FIG. 10 is a diagram illustrating an example of a structure of the resistance memory element. The resistance memory element has a structure in which a memory layer is placed between a drain electrode and a source electrode. The resistance memory element is characteristic in being capable of changing resistance of the memory layer by applying a voltage pulse between the drain electrode and the source electrode. The resistance memory element stores information based on the magnitude of resistance. A state having high resistance is referred to as a high resistance state (HRS: High Resistance State), and a state having low resistance is referred to as a low resistance state (LRS: Low Resistance State).
FIGS. 11A and 11B illustrate examples of the voltage pulse applied to the resistance memory element at the time of writing. FIG. 11A illustrates an example of the voltage pulse applied between the drain and the source in an operation to write the LRS (referred to as “set” hereinafter) to the resistance storage element. A horizontal axis represents time, and a vertical axis represents Vds. Here, the symbol Vds represents a drain voltage with reference to a source voltage. Accordingly, when the Vds is positive, the drain voltage is higher than the source voltage and, when the Vds is negative, the source voltage is higher than the drain voltage. At the time of the set, as illustrated in FIG. 11A, a voltage pulse having a width of 50 ns and Vds at 2 V is applied.
FIG. 11B illustrates an example of the voltage pulse applied between the drain and the source in an operation to write the HRS (referred to as “reset” hereinafter) to the resistance storage element. At the time of the reset, a voltage pulse having a width of 20 ns and the Vds at −2 V is applied. In this way, directions of the voltage pulse applied between the drain and the source at the time of the set and at the time of the reset become opposite to each other. Hereinafter, a direction same as the voltage pulse applied at the time of the set, i.e., a positive Vds direction is referred to as “a forward bias”, and a direction the same as the voltage pulse applied at the time of the reset, i.e., a negative Vds direction is referred to as “a reverse bias”.
Writing the LRS or the HRS to the resistance memory element is characteristic in being not always successfully carried out by application of the voltage pulse one time. As such, in writing the LRS or the HRS to the resistance storage element, an operation referred to as verification of successful writing (verification) is carried out by reading after application of a set/rest pulse (see NPL 1 set forth below). When it is determined as a result of the verification that the writing has been unsuccessful, the set/rest pulse is applied again, followed by execution of the verification. This process is repeated until the writing is performed successfully.
In order to find which one of the HRS and the LRS is written to the resistance storage element, the HRS or the LRS may be read by applying the voltage between the drain and the source and detecting a current. FIG. 12A illustrates dependence of a current flowing to the resistance storage element on the Vds. In FIG. 12A, white circles represent currents flowing to the resistance storage element including the LRS written thereto, and black circles represent currents flowing to the resistance storage element including the HRS written thereto. FIG. 12B is a graph with a vertical axis representing resistance calculated from the current of FIG. 1A. In FIG. 12B, white circles represent resistance of the resistance storage element including the LRS written thereto, and black circles represent resistance of the resistance storage element including the HRS written thereto. Since the resistance is significantly different between the HRS and the LRS as illustrated in FIG. 12B, the HRS and the LRS may be identified based on the magnitude of the resistance.